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Principal Engineer

Chandler (Office)💼 Full-time💰 $174,070–$174,070🗓 2026-08-07 → 2026-09-26

Core

Perform semiconductor engineering design, development, and testing for electronic communications products, focusing on digital functional verification of mixed-signal circuit designs.

Role type

Principal Engineer (ASIC Design Verification)

Builds

Mixed-signal circuit designs and IP test specifications for NXP firm products

Domain

Semiconductor / Electronic Communications

Deliverable

production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work

Required skills

ARM processor multi-processor interaction, Serial communication protocols (I2C, SPI, SPMI, UART), SOC Testbench, System Verilog, UVM Verification, GLS simulations and debug features, ASIC design verification, Regression management and artifact tracking, C-based test development, SPI interface

Responsibilities

Develop UVM simulation environments (drivers, monitors, checkers, assertions), run digital and top-level simulations, define IP test specifications, ensure 100% coverage prior tape-out, create and maintain regression test suites, report bugs and propose solutions, prepare and hold design verification reviews

Seniority

Principal, hands-on IC

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