Senior Analog Mixed Signal Verification Engineer
Core
Lead verification for automotive and industrial PMIC products from specification through signoff, ensuring functional correctness, safety, and robustness.
Role type
Senior IC verification engineer (analog mixed-signal)
Builds
Automotive and industrial power management ICs (PMICs), DC-DC converters, LDOs, ADCs, DACs, and sensor interfaces
Domain
Semiconductor / Analog Mixed-Signal / Automotive & Industrial
Required skills
Verilog-AMS, SystemVerilog, UVM, mixed-signal simulation, Real Number Modeling (RNM), constrained-random verification, coverage-driven verification, formal verification, low-power verification, Python/Perl/Tcl/Shell scripting, EDA tools (Cadence, Synopsys, Siemens)
Preferred skills
Mentorship, cross-functional collaboration, methodology improvement
Technologies
Verilog-AMS, SystemVerilog, UVM, Cadence, Synopsys, Siemens EDA, Python, Perl, Tcl, Shell
Responsibilities
Define verification strategies, environments, regressions, and coverage objectives for complex mixed-signal IPs and SoCs; Develop and validate mixed-signal simulation environments, behavioral models, checkers, assertions, and scoreboards; Lead verification execution including test planning, debug, and signoff; Bridge digital and mixed-signal verification flows; Verify digital control, monitoring, telemetry, and protection functions within PMICs; Mentor junior engineers and drive methodology improvements.
Seniority
Senior, hands-on IC with leadership responsibilities
