Senior Digital Verification Engineer
Core
Lead digital verification for next-generation Power Management ICs (PMICs) serving automotive and industrial applications.
Role type
Senior IC digital verification engineer
Builds
Power Management ICs (PMICs) for automotive and industrial markets
Domain
Semiconductor / Power Electronics / Automotive
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
SystemVerilog, UVM, constrained-random verification, coverage-driven verification, formal verification, Python scripting, low-power design concepts, SoC integration, protocol knowledge (AMBA, I2C, SPI, UART, CAN, LIN, DDR, PCIe)
Preferred skills
FPGA/emulation platform experience (HAPS, Palladium, Zebu), PMIC architecture knowledge, AI/LLM tool usage
Technologies
SystemVerilog, UVM, Python, Perl, UNIX/Linux shell, SVA, UPF, CPF, AMBA, I2C, SPI, UART, CAN, LIN, DDR, PCIe
Responsibilities
Define verification plans, methodologies, environments, and signoff criteria; Develop and maintain advanced verification environments; Create directed and constrained-random test scenarios; Analyze functional, code, and assertion coverage; Verify PMIC digital control, telemetry, safety, and power sequencing; Mentor junior engineers and drive methodology improvements
Seniority
Senior, hands-on IC
