CareerPlan

Entry Level DFT Design Engineer

Austin (Oakhill, Office), USFull-time2026-10-19 → 2026-11-10

Core

Design and support Design-for-Test (DFT) structural test patterns for microprocessor-based System-on-Chip (SoC) designs from initial requirements through full-scale production.

Role type

Entry-level DFT Design Engineer

Builds

DFT test patterns, built-in self-test (BIST) features, and test coverage for semiconductor products

Domain

Semiconductor / VLSI / Microprocessor Design

Required skills

Python, Verilog, Perl, Tcl, Unix, Structural Test design, ATPG, Test Coverage, Fault Universe, JTAG, BSDL, Memory BIST, Logic BIST, DFT Logic, ATE VLSI Tester programming

Preferred skills

ATE VLSI Tester programming (J973, Tiger/Catalyst, UltraFex, Verigy 93000), Functional pattern test

Technologies

FastScan, LBIST, MBIST, DFTCompiler, J973, Tiger/Catalyst, UltraFex, Verigy 93000

Responsibilities

Participate in global Design teams to bring new SoC designs through initial test requirements to production; Create and validate test patterns and BIST features; Interface with Test Engineering, Product Engineering, and Fab; Support manufacturing test, qualification, yield enhancement, and product performance analysis

Seniority

Entry Level, 0-2 years experience