Senior Lead Design Engineer
Core
Leading SoC debug, micro-architecture, and integration from specification to tape-out for automotive, edge, and radar processing chips.
Role type
Senior Lead Design Engineer (SoC)
Builds
Systems-on-a-Chip (SoCs) for automotive, edge, radar processing, and advanced analog business lines
Domain
Semiconductor / SoC Design / Automotive
Required skills
RTL design flow, SoC debug infrastructure, ARM CoreSight/ETM/STM/DAP/CTI/JTAG/SWD/Trace32, Verilog coding, CDC/RDC/Lint/Synthesis, IP integration, Clocking/Reset/System modes, Interconnect (AXI/ACE/APB/ATB), Safety/Security architectures
Preferred skills
Computer architecture (ARM, RISC-V), CPU architecture, Peripherals (PCIe, USB, DDRs), Serial/Multimedia/External Bus Interfaces
Technologies
Verilog, ARM Cortex-M/A/R, Trace32, JTAG, SWD, AXI, PCIe, USB, DDR
Responsibilities
Lead SoC debug, micro-architecture, and integration from spec to tape-out; Drive and implement best SoC design methodology; Sign off RTL, timing constraints, CDC, RDC; Document SoC design and micro-architecture; Provide post-silicon debug support
Seniority
Senior, hands-on IC
