Lead DSP Engineer
Core
Implement and optimize DSP algorithms and architecture for next-generation automotive-grade Ethernet PHY products.
Role type
Lead DSP Engineer (Automotive Ethernet PHY)
Builds
Automotive Ethernet PHY silicon (100/1000BASE-T1 and multi-gig PHYs)
Domain
Automotive semiconductor / Digital Signal Processing / PHY layer technologies
Deliverable
production ML models | product features
Required skills
DSP algorithm design, RTL design (Verilog/SystemVerilog), fixed-point modeling, timing closure, MATLAB/Simulink, Python, C/C++, PHY subsystems (filtering, equalization, echo cancellation, PLLs, timing recovery)
Preferred skills
Automotive Ethernet PHY experience, EMC/EMI knowledge, DFT/ATPG, backend flows, formal verification, UVM
Technologies
MATLAB, Simulink, Python, C/C++, Verilog, SystemVerilog, UVM
Responsibilities
Implement DSP algorithms and architecture under guidance, develop synthesizable RTL for DSP datapaths, support verification and post-silicon debug, collaborate with System Architects and DFT teams, develop MATLAB/Python models for algorithm validation
Seniority
Senior, hands-on IC