SoC Digital Physical Design Engineer - MCU
Core
Lead physical design implementation for complex, high-performance MCU SoCs from RTL to GDSII, driving tape-out of cutting-edge microcontrollers.
Role type
Senior IC physical design leader (SoC)
Builds
High-performance microcontroller SoCs for industrial automation, autonomous home, and personal electronics
Domain
Semiconductor / VLSI / Embedded Systems
Deliverable
production ML models | product features
Required skills
Physical design flow (floorplanning, P&R, CTS, STA, DRC/LVS), Timing closure (hierarchical STA, AOCV/POCV, multi-corner/multi-mode), Power integrity (IR/EM) analysis, EDA tool expertise (Synopsys/Cadence/Siemens), Scripting (Tcl/Python/Perl), Low-power design techniques (UPF/CPF, clock gating)
Preferred skills
Advanced tech nodes (16FF and below), Signal integrity (SI) solutions, Mentorship of junior engineers
Technologies
Synopsys Fusion Compiler, ICC2, Primetime, Design Compiler; Cadence Innovus, Tempus, Genus; Siemens APR, Calibre
Responsibilities
Execute full physical design flow for complex digital blocks and top-level SoCs; Develop and optimize advanced physical design methodologies; Perform critical path analysis and timing closure; Drive power integrity analysis and solutions; Conduct comprehensive physical verification checks; Mentor and guide junior physical design engineers; Evaluate and recommend new EDA tools and methodologies
Seniority
Senior, hands-on IC with technical leadership