<Data center>Communication Algorithm Engineer/senior Engineer/Technical Manager
Core
Designing communication algorithms, PHY architecture, and digital signal processing for high-speed interfaces and transceivers.
Role type
Senior IC communication algorithm engineer
Builds
High-speed SerDes interfaces and Ethernet PHY/transceiver architectures
Domain
Hardware/Telecommunications
Deliverable
production ML models | product features | infrastructure
Required skills
IEEE 802.3 Ethernet PHY design, transceiver architecture, digital signal processing, mixed-signal design, system simulation, SerDes algorithm design
Preferred skills
Standardization contributions
Technologies
IEEE 802.3, SerDes, mixed-signal design tools
Responsibilities
Design IEEE 802.3 Ethernet PHY and transceiver architecture, perform digital signal processing for mixed-signal design, create system simulations for pre-silicon verification, design and simulate high-speed SerDes interfaces, contribute to standard organizations