Analog mixed signal design engineer
Core
Design and verify high-speed analog and mixed-signal blocks for next-generation wireline and optical transceivers serving data centers, cloud infrastructure, and AI/HPC.
Role type
Analog mixed-signal design engineer
Builds
High-speed SerDes topologies (112Gbps PAM-4 and beyond) for data center and AI/HPC transceivers
Domain
Semiconductor design, high-speed analog/mixed-signal, data center networking
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
SerDes design, analog circuit design, mixed-signal design, silicon debugging, high-speed interface evaluation
Technologies
112Gbps PAM-4, SerDes, ADCs, DACs, PLLs, clock distribution
Responsibilities
Architecture study and evaluation of advanced SerDes topologies; SerDes design and verification of high-speed analog and mixed-signal blocks; Evaluate, measure, and debug silicon until high volume production; Work with cross functional teams to optimize designs