STAFF ENG-HIG-HBM-LAYOUT
Core
Lead the layout design and development of complex analog, mixed-signal, and digital blocks and full chip level integration for memory and storage solutions.
Role type
Staff IC Layout Engineer (Memory/Analog/Mixed-Signal)
Builds
High-performance DRAM, NAND, and NOR memory and storage products
Domain
Semiconductor / VLSI / Memory Technology
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
IC layout design, LVS/DRC/Antenna verification, Cadence VLE/VXL, Mentor Graphics Calibre, Array Layout, Decoder design, Control logic, IOs, PLLs, ADCs, DACs, LDOs, Bandgaps, Reference Generators, Charge Pumps, Current Mirrors, Comparators, Differential Amplifiers, Memory layout principles, Bit cell design, Addressing, Banking, Electromigration, Latch-up, Coupling, Crosstalk, IR-drop, Parasitic effects, Tapeout experience, Project management
Preferred skills
Memory architecture familiarity, Global team collaboration
Technologies
Cadence VLE, Cadence VXL, Mentor Graphics Calibre
Responsibilities
Perform layout verification including LVS, DRC, and antenna checks, Lead the layout design and development of complex analog, mixed-signal, and digital blocks, Provide technical guidance and mentorship to junior team members, Manage multiple layout projects ensuring quality and timely delivery, Collaborate with global engineering teams for successful execution and integration
Seniority
Staff, hands-on IC with leadership and mentorship
