Principal Physical Design Architect, HBM
Core
Developing optimized floorplans, circuit placement, and routing strategies for next-generation High Bandwidth Memory (HBM) products using advanced process nodes.
Role type
Principal Physical Design Architect (HBM)
Builds
High-performance, high-density HBM DRAM solutions
Domain
Semiconductor / Memory / Physical Design
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
Analog layout fundamentals, mixed-signal layout, floorplanning, placement and routing, timing/power/area trade-off analysis, DRC/LVS verification, EM/latch-up/crosstalk/IR-drop analysis
Preferred skills
DRAM/SRAM physical design experience, technical communication, fast-paced team environment adaptability
Technologies
Cadence VLE/VXL, Mentor Graphics Calibre
Responsibilities
Develop floorplans optimizing placement, routing, and power delivery; Deliver block-level analog/mixed-signal layouts; Collaborate on integration strategies; Evaluate timing/area/power/complexity trade-offs; Support Memory/Logic/Analog circuit integration; Ensure alignment with manufacturability and verification constraints; Participate in full-chip integration reviews and issue fixing
Seniority
Principal, hands-on IC
