ASIC Verification Engineer - Clocks
Core
Senior ASIC Verification Engineer responsible for validating clocking and reset logic in SOC automotive and datacenter ASICs, ensuring bug-free designs for products ranging from data centers to self-driving cars.
Role type
Senior IC ASIC Verification Engineer (Clocks)
Builds
High-quality clocking and reset logic for NVIDIA SOC automotive and datacenter ASICs
Domain
Semiconductor / ASIC Design / Clocking & Reset
Deliverable
production ML models | product features
Required skills
System Verilog, UVM, C++, Perl, Python, Formal Verification, Coverage metrics, Profiling tools, X-prop analysis, Test plan development, Automation, Block-level verification, System-level verification
Preferred skills
DFT/IST knowledge, Multi-platform support, Scalable solution design
Technologies
System Verilog, UVM, C++, Perl, Python, NVIDIA custom compilers
Responsibilities
Own validation of Clocking structures from test plan development to productization; Develop scalable verification solutions across platforms; Partner with clocks/reset architecture and design teams; Execute test plans for pre-silicon platforms
Seniority
Senior, hands-on IC
