ASIC Design Verification Engineer
Core
Architect and enhance verification environments for high-performance custom silicon to validate mission-critical functionality and performance for Waymo's autonomous vehicle compute platform.
Role type
ASIC Design Verification Engineer
Builds
High-performance custom silicon compute platforms for autonomous vehicles
Domain
Automotive computing / ASIC design
Deliverable
production ML models
Required skills
UVM, SystemVerilog, constrained-random generation, functional coverage, SVA, Python automation, RTL debugging
Preferred skills
Power-aware verification (UPF), formal verification, hardware-software co-validation, ML accelerators, high-speed interconnects, PCIe Gen 5/6, DDR5, Ethernet, Generative AI for verification
Technologies
UVM, SystemVerilog, Python, PCIe, DDR5, Ethernet
Responsibilities
Partner with design teams to translate hardware specs into verification plans; Develop testbenches, reference models, and stimulus; Architect and enhance verification environments; Evaluate and integrate third-party Verification IP; Define and analyze coverage metrics; Establish verification best-practices
Seniority
Mid-level, hands-on IC
