Senior Memory Controller Verification Engineer
Core
Develop verification infrastructure and test plans for GPU memory subsystem IP to ensure functional correctness and performance for consumer graphics, self-driving cars, HPC, cloud computing, and AI.
Role type
Senior IC verification engineer (memory controller)
Builds
GPU memory subsystem IP for consumer graphics, autonomous vehicles, HPC, cloud, and AI
Domain
Semiconductor / GPU / Memory Subsystem
Deliverable
production ML models | product features
Required skills
System Verilog, UVM, ASIC verification, testbench development, BFM creation, coverage closure, performance testing, FPGA integration, post-silicon verification
Preferred skills
C/C++ programming, dynamic memory controller experience (DDR, LPDDR, HBM, GDDR), Python/Perl/shell scripting, advanced debugging
Technologies
VCS, Debussy, GDB, System Verilog, UVM, FPGA
Responsibilities
Develop verification infrastructure (testbenches, BFMs, checkers, monitors, randoms); drive test plan execution for planned features; define and drive performance test plans; ensure code and functional coverage of RTL; enable FPGA and software teams for testing; plan and participate in post-silicon verification and debug
Seniority
Senior, hands-on IC
