Senior DFT Engineer
Core
Lead silicon test innovation and bring-up for NVIDIA's next-generation GPU/SoC platforms, ensuring flawless execution and quality from pre-silicon to production.
Role type
Senior IC DFT Engineer (Silicon Test & Bring-up)
Builds
Next-generation silicon platforms (GPU/SoC)
Domain
Semiconductor / VLSI Design
Required skills
DFT architecture, scan test planning, BIST (memory/IO), fault modeling, ATPG, fault simulation, silicon debug, bring-up, pattern development, scripting
Preferred skills
GPU/SoC bring-up experience, lab debugging (oscilloscopes/logic analyzers), RAS, InSystem Test, PVT dependencies, VF characterization
Technologies
Vendor ATPG tools, scripting languages
Responsibilities
Design and roll out advanced test methodologies; Implement test access mechanisms, IO BIST, memory BIST, and scan compression; Lead end-to-end planning and execution of chip bring-up; Develop and standardize methodologies and workflows for silicon bring-up; Mentor junior engineers on complex build trade-offs
Seniority
Senior, hands-on IC
