Software R&D Engineer, VLSI Physical Design - New College Grad 2026
Core
Developing internal EDA tools for VLSI physical design optimization to increase chip frequency while minimizing power consumption.
Role type
R&D Software Engineer (VLSI Physical Design Algorithms)
Builds
Internal optimization tools for chip design (sizing, buffering, CTS, legalization, routing)
Domain
Semiconductor hardware design / VLSI Physical Design
Deliverable
production ML models | product features
Required skills
VLSI Physical Design Algorithms, C++, VLSI timing optimization, design implementation tools (ICC2, Innovus, PrimeTime, Tempus, StarRC), scripting (Perl, Tcl, Python)
Preferred skills
C++14+, multithreading, distributed computing, reinforcement learning, Graph Neural Networks (GNNs), PPA optimization
Technologies
C++, ICC2, Innovus, PrimeTime, Tempus, StarRC, Perl, Tcl, Python
Responsibilities
Invent new optimization engines fusing independent steps (e.g., legalization and sizing); Improve algorithms for gate-level sizing, buffering, clock skew, cell legalization, power minimization, ECO routing, and parasitic extraction; Collaborate with design teams to deploy solutions
Seniority
Entry-level (New College Grad 2026)