Senior Digital Design Engineer - High-Speed I/O and Photonics
Core
Designing high-speed digital front-end and back-end for silicon photonics IPs and chips, enabling AI systems and high-performance networking.
Role type
Senior Digital Design Engineer (High-Speed I/O and Photonics)
Builds
PHY IPs and Chips for copper and fiber channels supporting NVLINK, Ethernet, and InfiniBand protocols.
Domain
Semiconductor / High-Speed Interconnects / Silicon Photonics
Deliverable
production ML models | product features
Required skills
High-speed digital design, Verilog/System Verilog, logic design, static timing analysis, UVM verification, synthesis constraints, timing closure, PPA trade-off evaluation, silicon bring-up, testing script development.
Preferred skills
Optical transceiver devices (modulators, detectors, TIAs), SerDes architecture (CDR, DFE, CTLE, TXFIR), digital assist analog designs, mixed-signal circuit behavior modeling, physical layer protocols (Ethernet, InfiniBand, PCIe, USB), on-chip microcontrollers, hardware/firmware co-design.
Technologies
Verilog, System Verilog, UVM, Synthesis tools, P&R tools, Silicon bring-up environments.
Responsibilities
Develop micro-architecture specifications and calibration algorithms; define synthesis constraints and drive timing closure; evaluate PPA trade-offs; participate in silicon bring-up and performance tuning; build testing scripts for debugging and characterization.
Seniority
Senior, hands-on IC
