Senior Design Verification Engineer - GPU Memory Subsystem
Core
Develop and implement design verification strategies for GPU ASIC memory subsystem IP, focusing on caches, coherency, pipelines, and arbitration.
Role type
Senior IC design verification engineer (pre-silicon ASIC)
Builds
GPU memory subsystem IP for accelerated computing
Domain
Semiconductor / Computer Architecture
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
Pre-silicon ASIC verification strategy, functional and performance verification, Verilog/System Verilog, UVM components, Python/C++ scripting, regression triage, coverage closure, debug skills
Preferred skills
Experience with caches, coherency, complex pipelines, arbiters, interconnect networks, infrastructure development, AI for verification
Technologies
Verilog, System Verilog, UVM, Python, C++
