Senior Design Verification Engineer - GPU Memory Subsystem
Based in United States
Core
Develop and implement design verification strategies for GPU ASIC memory subsystem IP, focusing on caches, coherency, pipelines, and arbitration.
Role type
Senior Design Verification Engineer (Pre-silicon ASIC)
Builds
GPU memory subsystem IP for NVIDIA GPUs
Domain
Semiconductor / Computer Architecture
Required skills
Pre-silicon ASIC verification, Verification strategy development, Testbench development, UVM, Verilog/System Verilog, Computer architecture fundamentals, Debug skills, Regression triage, Coverage closure
Preferred skills
Experience with caches/coherency/pipelines/arbiters, Infrastructure development, AI for verification, Python/C++ scripting
Technologies
UVM, Verilog, System Verilog, Python, C++
