Senior Verification Engineer - HSIO Cluster and SOC
Core
Architect and develop cluster and system-level verification environments for high-speed I/O IPs and sub-systems in automotive chips.
Role type
Senior IC verification engineer (HSIO/SOC)
Builds
Production verification environments and testbenches for automotive SoC
Domain
Semiconductor / Automotive chips / High-speed I/O
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
UVM, SystemVerilog, C/C++, High-speed I/O verification (UFS/PCIe/XUSB), Ethernet MAC/Switch knowledge, Bus Functional Models, Functional Coverage, Debugging
Preferred skills
AI tools for code development, Formal verification, Automation
Technologies
SystemVerilog, C/C++, UVM, SV, FPGA, Simulation tools
Responsibilities
Architect testbenches and craft verification environments using SV and C/C++; Define test plans and verification infrastructure; Build reusable bus functional models, monitors, checkers, and scoreboards; Implement functional coverage and own SOC level verification closure; Collaborate with architects, designers, FPGA, and post-silicon teams
Seniority
Senior, hands-on IC
