Senior Mixed Signal Design Engineer
Core
Designing high-speed memory I/O interfaces (LPDDR, DDR, GDDR, HBM) and SerDes circuits in deep submicron CMOS FinFET processes.
Role type
Senior Mixed-Signal/Analog/IO Circuit Design Engineer
Builds
High-speed memory interface chips and SerDes components for NVIDIA GPUs and AI systems
Domain
Semiconductor / High-Speed Digital & Analog Design
Required skills
High-speed memory design (LPDDR, DDR, GDDR, HBM), SerDes design, Deep submicron CMOS FinFET circuit design, Device reliability (ESD, Latch-Up), Cadence custom design environments, Hspice/XA/FineSim/Spectre simulation, Verilog/Nanotime/Matlab, Package substrate design, Power Delivery Network (PDN) analysis
Preferred skills
Mentoring junior engineers, Hands-on validation using high-end lab test and measurement equipment
Technologies
Cadence, Hspice, XA, FineSim, Spectre, Verilog, Nanotime, Matlab, FinFET, LPDDR, DDR, GDDR, HBM
Responsibilities
Design mixed-signal/analog circuits for high-speed memory I/O interfaces, Solve circuit design challenges in deep submicron CMOS FinFET processes, Take designs through productization across all development stages, Collaborate with multi-functional teams to optimize designs, Supervise layout development for reliability and physical integrity, Bridge die-to-system gaps including package and board-level constraints
Seniority
Senior, hands-on IC
