Principal Verification Chip Design Engineer
Core
Define and build best-in-class verification methodologies, shared code, and infrastructure to ensure high-quality chip design deliveries at scale.
Role type
Principal verification engineer (technical lead)
Builds
Foundational verification flows, shared verification code, and automation infrastructure
Domain
Semiconductor chip design verification
Required skills
Pre-silicon verification, verification methodologies, design risk identification, verification scope definition, infrastructure development, shared code development, design automation partnership, EDA tool integration, simulation tools, performance optimization
Preferred skills
Process leadership across multiple groups, driving change in verification lifecycle
Technologies
EDA tools, simulation tools, verification automation frameworks
Responsibilities
Define groundbreaking verification methodologies, mentor designers and verification specialists, identify design risks and define verification scope, lead infrastructure development, guide shared verification code development, partner with design automation teams, collaborate with EDA vendors, lead verification strategies and training sessions
Seniority
Principal, technical lead & mentorship
