Senior Front-End Power Engineer
Core
Analyze full chip and unit-level power data to drive ASIC teams in improving power efficiency for NVIDIA Switches.
Role type
Senior IC power optimization and analysis engineer
Builds
Energy-efficient NVIDIA Switches products
Domain
Semiconductor / ASIC design / Power engineering
Deliverable
production ML models | product features
Required skills
Pre-silicon gate-level power analysis, RTL power analysis, Verilog, ASIC design, Python, Perl, C++, workload selection, power bug identification
Preferred skills
Power Artist, PTPX (Prime Power RTL, RTL Architect), low power design concepts, data-driven decision-making
Technologies
Verilog, Python, Perl, C++, Power Artist, PTPX
Responsibilities
Develop and share best practices for pre-silicon power analysis; perform comparative power analysis to spot trends and anomalies; interact with architects and RTL designers to interpret power data and drive fixes; prototype new architectural features in Verilog for power analysis.
Seniority
Senior, hands-on IC
