Senior Design Engineer, HBM
Core
Design, simulation, and validation of next-generation High-Bandwidth Memory (HBM) architectures and circuit blocks for AI/ML, HPC, and advanced graphics products.
Role type
Senior IC design engineer (HBM/DRAM)
Builds
HBM memory products and subsystems
Domain
Semiconductor / High-performance computing
Deliverable
production ML models
Required skills
HBM/DRAM design, 3D stacked architecture, TSV signaling, wide I/O interfaces, PHY timing, power integrity, system co-optimization, analog/digital simulation, mixed-signal design, function verification, timing analysis, reliability mitigation
Preferred skills
AI/ML-enabled tools, device reliability knowledge, tape-out support, ECO management
Technologies
HSPICE, VerilogHDL, Primesim
Responsibilities
Design, optimize, and validate memory, logic, analog, or mixed-signal circuits used in HBM products; Work closely with layout engineers on floorplanning, placement, routing, and design rule compliance; Review parasitics, EM/IR, and reliability results; Perform pre-layout and post-layout simulation, modeling, and analysis; Collaborate with Design Verification teams to review test plans, debug failures, and close coverage gaps
Seniority
Senior, hands-on IC