Sr Engineer, Design
Core
Develop, integrate, and optimize Design for Test (DFT) strategies for NAND flash memory designs, including digital, custom/analog circuits, and memory arrays.
Role type
Senior IC DFT Engineer (NAND Flash)
Builds
NAND flash memory chips with integrated testability and validation firmware
Domain
Semiconductor / Memory Storage
Deliverable
production ML models | product features
Required skills
Digital design, Custom/Analog Design, Verification, DFT principles, NAND flash memory architecture, Verilog, C/C++, Python
Preferred skills
AI-Enabled and Agentic AI technologies adoption, Lab skills (oscilloscope, LSA, function generator), Wafer and package level testing
Technologies
Verilog, XA simulations, Python, C/C++
Responsibilities
Develop and optimize DFT strategies for NAND flash memory designs; Analyze design testability for quality, coverage, and manufacturability; Create, debug, and optimize test sequences and modes; Design and validate firmware for NAND test algorithms; Collaborate with cross-functional teams for DFT integration; Support first silicon bring-up, debug, characterization, and ramp to high-volume production; Document DFT methodologies and validation results.
Seniority
Senior, hands-on IC
