ENGINEER, APTD Bonding process
Core
Drive HBM process development and yield improvement in WSS process, assisting advanced package technology (chip stacking, 2.5D or 3D) research and development.
Role type
Senior IC process engineer (advanced packaging/bonding)
Builds
High-bandwidth memory (HBM) and advanced packaging solutions for memory and storage markets
Domain
Semiconductor manufacturing, advanced packaging, materials science
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
WSS/BOND advanced technologies, temporary bonding/debonding, hybrid bonding, fusion bonding, surface activation, adhesion physics, interface energy, thermo-compression, plasma-assisted bonding, materials characterization, root cause analysis, project execution, cross-team coordination, supplier management
Preferred skills
PhD in Chemistry/Physics/Materials/Engineering Science, hands-on experience with SUSS/EVG/TEL tools, innovative integration mindset
Technologies
SUSS, EVG, TEL
Responsibilities
Drive HBM process development and yield improvement in WSS process; Assist advanced package technology (chip stacking, 2.5D or 3D) research and development; Support project on-site execution and make decisions as technical consultant; Troubleshoot complex problems and perform root cause analysis; Generate internal and external documentation for presentations and technical reports; Coordinate mechanical characterization for advanced packaging development efforts globally; Provide recommendations for test structure and test vehicle design; Review, summarize, and present data with recommendations of materials and lead discussions with packaging material suppliers
Seniority
Senior, hands-on IC
