SR ENGINEER, APTD Dry Etch Process
Core
Drive HBM process development and yield improvement in DRY ETCH process for advanced packaging (chip stacking, 2.5D/3D) and support on-site execution as a technical consultant.
Role type
Senior IC semiconductor process engineer (dry etch)
Builds
HBM memory and storage solutions for data centers, AI, and 5G applications
Domain
Semiconductor manufacturing, advanced packaging, dry etch process engineering
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
Dry etch process expertise (Silicon, Dielectric), root cause analysis, materials characterization, cross-team coordination, technical reporting, supplier management
Preferred skills
TSV experience, Plasma Dicing experience, PhD in Chemistry/Physics/Materials/Engineering Science
Technologies
Dry etch equipment, TSV, Plasma Dicing
Responsibilities
Drive HBM process development and yield improvement in DRY ETCH process; Assist advanced package technology research and development; Support project on-site execution and make decisions as technical consultant; Troubleshoot complex problems and perform root cause analysis; Generate internal and external documentation for presentations and technical reports; Coordinate mechanical characterization and testing for advanced packaging development efforts globally
Seniority
Senior, hands-on IC