MTS-RTL Verification Engineer
Core
Architect and develop scalable verification environments for high-speed memory and storage designs, ensuring functional closure and release readiness.
Role type
Senior IC RTL Verification Engineer
Builds
High-performance DRAM, NAND, and NOR memory and storage products
Domain
Semiconductor / Memory and Storage
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
SystemVerilog, UVM, constrained-random testing, Formal Verification, clock/reset/FSM/CDC fundamentals, high-speed digital design verification, simulation/coverage/debug tools, Python/Perl/Tcl scripting
Preferred skills
Power-aware verification, high-speed memory subsystem experience, global cross-site team collaboration
Technologies
SystemVerilog, UVM, Python, Perl, Tcl
Responsibilities
Own verification strategy and planning, architect reusable verification environments, drive functional and code coverage closure, lead debug and issue resolution, provide verification status and risk assessments, improve verification methodologies and automation, mentor engineers
Seniority
Senior, hands-on IC
