Pre-Silicon verification engineer
Core
Develop verification plans, test benches, and environments to validate complex IPs and subsystems for NIC, IPU, and AI domains using simulation and formal verification.
Role type
Pre-silicon verification engineer (ASIC/SOC)
Builds
Functional verification environments and testbenches for high-performance chips
Domain
Semiconductor hardware design (NIC, IPU, AI)
Deliverable
production ML models | product features
Required skills
System Verilog, OVM/UVM, formal verification, digital design fundamentals, microarchitecture principles, debugging, coverage analysis
Preferred skills
Formal property verification, System Verilog Assertions, AMBA protocols (APB, AXI), switching/routing protocols (Ethernet, IPSec, DTLS, MACSec), scripting (Python, Perl, Shell), AI tool integration
Technologies
System Verilog, OVM, UVM, Python, Perl, Shell, SystemC
Responsibilities
Develop and execute IP verification plans; Design and implement test benches and verification environments; Utilize AI and simulation models to analyze power, timing, and uncover bugs; Debug and resolve failing tests in pre-silicon environment; Collaborate with architects, designers, and emulation teams; Maintain and improve functional verification methodologies
Seniority
Senior, hands-on IC
