Technology Development Quality and Reliability Engineer
Core
Develop solutions and design rules to ensure Electrostatic Discharge (ESD) and Latch-up (LU) reliability in circuits during technology development.
Role type
Reliability engineer (ESD/Latch-up)
Builds
Design rules and test structures for analog circuits
Domain
Semiconductor manufacturing / Device Physics
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
ESD reliability engineering, Latch-up reliability engineering, Device Physics, Device characterization, VLSI design knowledge, Transmission Line Pulse (TLP) measurement, ESD models (CDM, HBM), Data analysis (JMP, Excel)
Preferred skills
Ph.D. in electrical engineering, Test structure layout planning, Analog and digital VLSI circuit design, State-of-the-art ESD circuit design techniques, Transistor device characteristics understanding
Technologies
TLP, JMP, Excel
Responsibilities
Design test structures, run experiments, analyze data from test structures, develop and publish design rules, consult with design teams on ESD risks
Seniority
Senior, hands-on IC
