Analog Design Engineer
Core
Design of I/O circuits including GPIOs, level shifters, LVDS, bandgap, LDO, and multi-voltage buffers for consumer electronics and mobile computing, optimizing for power, performance, and area.
Role type
Analog Design Engineer (I/O circuits)
Builds
I/O IP blocks for SoC integration in consumer electronics and mobile computing products
Domain
Semiconductors / Analog IC Design
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
CMOS transistor design, short channel effects analysis, I/O circuit design (failsafe/non-failsafe), multi-voltage design, LVDS, ESD protection schemes, PVT corner simulations, reliability analysis, Monte Carlo analysis, signal integrity checks, Verilog, IBIS data generation
Preferred skills
Strong understanding of CMOS transistors and short channel effects, experience with ESD protection schemes, ability to run signal integrity checks, ability to establish strong relationships with key stakeholders
Technologies
Verilog, IBIS, PVT corner simulations, Monte Carlo analysis
Responsibilities
Design I/O circuits and optimize for power/performance/area, ensure design robustness through PVT corner simulations and reliability analysis, perform post-layout simulations and debug layout issues, analyze and document verification data, provide inputs on dotlibs and Ibis data generation, collaborate with cross-functional teams for SoC IP integration
Seniority
Mid-level, hands-on IC