Physical Design (Backend) Technical Leader
Core
Lead backend implementation of advanced Intel wireless products (VLSI chips) by defining design flows, automation, and signoff methodologies.
Role type
Senior Physical Design Technical Lead
Builds
Complex VLSI chips for Intel wireless products
Domain
Semiconductor / VLSI Physical Design
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
VLSI physical design flows (floorplanning, placement, routing, timing closure), PPA optimization, STA, IR drop, EM analysis, DRC/LVS, ECO flows, EDA tool integration, team mentoring
Preferred skills
Synopsys EDA tools, Cadence tools, scripting (Python, Perl, TCL)
Technologies
Synopsys EDA tools, Cadence, Python, Perl, TCL
Responsibilities
Define and improve design implementation flows and automation; Lead physical design flow and implementation for complex VLSI chips; Optimize PPA metrics; Analyze and resolve design issues (Place and Route, timing, power, signal integrity, manufacturability); Collaborate with design teams for integration; Mentor junior engineers; Interface with EDA vendors.
Seniority
Senior, hands-on IC with leadership responsibilities