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Senior Digital ASIC Design Engineer

Cambridge, MA💼 Full-time💰 $82,300–$82,300🗓 2026-07-07 → 2026-07-31

Core

Design and simulate high-performance digital ASICs from RTL through synthesis, optimizing for performance, power, and cost in advanced technologies.

Role type

Senior IC design engineer (digital ASIC)

Builds

Custom digital integrated circuits for defense, space, and biomedical applications

Domain

Semiconductor hardware engineering

Deliverable

production ML models | product features | infrastructure

Required skills

RTL design (System Verilog, Verilog, VHDL), transistor-level circuit design, synthesis, floor-planning, design-for-test, low-power design, CMOS advanced nodes, radiation-hardened electronics, secure system architectures

Preferred skills

Tape-out experience at advanced nodes, team leadership

Technologies

Cadence, Synopsys, LINT

Responsibilities

Design and simulate circuits at transistor-level, optimize hardware designs for performance/power/cost, evaluate hardware feasibility of complex algorithms, independently contribute to complex chip architectures, guide physical layout and simulation, develop and teach best practices

Seniority

Senior, hands-on IC

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