Digital Design Engineer
Core
Design and implementation of digital logic at the RTL level for ASICs or SoCs from specification to tape-out.
Role type
RTL Digital Design Engineer
Builds
Semiconductor designs (ASICs/SoCs)
Domain
Semiconductor / Digital Logic Design
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
RTL coding, microarchitecture design, Verilog, VHDL, System Verilog, SoC architecture, ARM Cortex-M cores, AMBA protocols (AHB, APB), digital logic design principles, finite state machines, timing closure, synthesis constraints, DFT
Preferred skills
Power saving methodologies, lint, CDC, verification techniques and tools
Technologies
Verilog, VHDL, System Verilog, ARM Cortex-M, AMBA
Responsibilities
Design and implementation of digital logic at the RTL level, optimize designs for performance/area/power, participate in pre-silicon and post-silicon debug, coordinate with physical design teams for timing closure, contribute to design reviews
Seniority
Mid-level, hands-on IC
