3D Heterogeneous Integration Development Intern (Summer 2027)
Core
Support advanced packaging and process-integration development including wafer-to-wafer hybrid bonding, die-to-wafer hybrid bonding, TSV/TOV, and interposer technologies.
Role type
Summer intern, hands-on IC
Builds
Advanced semiconductor packaging solutions
Domain
Semiconductor manufacturing / Advanced packaging
Deliverable
production ML models
Required skills
Design of experiments (DOE), engineering data analysis, process modeling, technical documentation, cross-functional collaboration
Preferred skills
Prior internship experience, leadership experience, AI tool usage, project management, advanced semiconductor packaging knowledge
Technologies
Semiconductor tooling, hybrid bonding equipment, TSV/TOV tools
Responsibilities
Plan and perform design of experiments using internal and external tooling; Analyze and interpret engineering data from experiments and characterization; Develop or support process models to improve integration performance; Assist engineers with daily integration and process-development activities; Collaborate with process, materials, equipment, and external partner teams; Summarize experimental results and communicate technical findings to stakeholders
Seniority
Intern, entry-level