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Engineer Ecosystem Enablement

SGP - Woodlands, SGFull-time2026-10-06 → 2026-10-07

Core

Qualify and validate semiconductor IP libraries across technology platforms, ensuring compatibility with PDK updates and supporting customer tape-outs.

Role type

Senior IC IP Quality Assurance Engineer

Builds

Qualified IP merge kits and validated IP libraries for customer silicon production

Domain

Semiconductor manufacturing / IP verification

Required skills

RTL to GDS flow knowledge, Analog simulation, Layout design, DRC/DFM/LVS debugging, CAD tools proficiency, Scripting and automation

Preferred skills

Library compiler/Prime-time/VCS familiarity, Project management, AI tool adoption (via careerplan.io/jobs/JR-2604329-engineer-ecosystem-enablement-at-globalfoundries)

Technologies

VCS, Prime-time, Library compiler, DRC, DFM, LVS, PEX, Spice

Responsibilities

Execute IP QA against checklists and issue approval/non-conformance certificates, Define comprehensive test cases for IP qualification and regression, Perform IP regression (Physical verification DRC/LVS/DFM, PEX extraction, Spice simulation), Maintain IP database and catalog, Support scripting and automation for efficiency, Consolidate IP assessment results and drive stakeholder closure

Seniority

Senior, hands-on IC