Experienced Staff Design Engineer, Verification
Core
Hardware design verification for RISCV architecture processors and cores, ensuring compliance with design specifications and standards.
Role type
Staff Design Engineer, Verification
Builds
Verified processor cores and system-on-chip (SoC) designs
Domain
Semiconductor manufacturing, Hardware design, VLSI
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
Hardware Description Languages (Verilog/System-Verilog), Test Bench Development, Test Plan Creation, Coverage Closure, Modeling, Flow and Methodology development, UNIX OS, Assembly, C Programming, Python or Perl Scripting
Preferred skills
Leadership experience, Project management, Mentoring
Technologies
RISCV, Verilog, System-Verilog, UNIX, Python, Perl
Responsibilities
Review design and RISCV standard specifications, develop test benches and test plans, create and debug test cases, achieve coverage closure, develop modeling and flow methodologies
Seniority
Staff, hands-on IC