RISC-V CPU Microarchitecture / RTL
Core
Designing next-generation RISC-V CPU microarchitecture and RTL for high-performance AI computing platforms.
Role type
Senior IC CPU RTL/Microarchitecture Engineer
Builds
High-performance RISC-V CPU cores and units for AI platforms
Domain
Semiconductor / AI Hardware
Deliverable
production ML models
Required skills
CPU microarchitecture design, RTL design (Verilog/SystemVerilog), design verification strategy, PPA optimization, hardware description languages
Preferred skills
RISC-V architecture (V-extension), AI-assisted design tools
Technologies
Verilog, SystemVerilog, VHDL
Responsibilities
Define microarchitecture specifications for CPU units (branch predictor, rename, scheduling, vector execution), write and optimize RTL code, develop and refine verification environments, apply AI tools to accelerate design process, mentor junior engineers
Seniority
Senior, hands-on IC
