Staff Verification Engineer
Core
Develop and maintain hardware verification testbenches and environments for Image Signal Processors (ISPs), Display Processors, and Video codecs within Arm Compute Subsystems.
Role type
Staff Verification Engineer (Hardware IP)
Builds
RTL verification environments, testbenches, and IP for automotive, IoT, and client markets
Domain
Semiconductor hardware verification (RTL, UVM, SV)
Deliverable
production ML models | product features | infrastructure
Required skills
constrained-random verification, SystemVerilog-UVM (SV-UVM), scripting, object-oriented programming, data structures, algorithms, verification environment ownership, technical leadership
Preferred skills
multiprocessing microarchitecture, AMBA bus protocols (APB/AHB/AXI), formal verification, video codec/ISP/display project experience, functional safety (ISO 26262/IEC 61508), continuous integration flows
Technologies
SystemVerilog, UVM, AMBA APB/AHB/AXI
Responsibilities
Specify and develop new hardware verification testbenches, improve existing testbenches for performance and efficiency, architect verification IP and full verification environments, analyze simulation data using machine learning and data science techniques, identify and implement process improvements, collaborate with engineering teams, mentor team members
Seniority
Staff, hands-on IC with leadership