PMTS Photonics Packaging Design Integration
Core
Lead development and sustainment of advanced optical packaging solutions for silicon photonics (SiPh) and co-packaged optics (CPO) platforms, focusing on thermal, mechanical, electrical, and optical chip package co-design.
Role type
Senior IC photonic packaging design integration engineer
Builds
Scalable, low-loss, and cost-effective packaging architectures for AI, HPC, and data center applications
Domain
Semiconductor manufacturing, silicon photonics, advanced packaging
Deliverable
production ML models | product features
Required skills
Advanced packaging design and layout, HFSS/Zmax/Flotherm simulation tools, cross-functional technical leadership, manufacturability and cost analysis, reliability qualification, design rule definition
Preferred skills
Materials science, thermal/mechanical simulation, failure analysis, design of experiments, chip package interaction for 2D/2.5D/3D/3.5D SiPh, OSAT ecosystem experience
Technologies
HFSS, Zmax, Flotherm
Responsibilities
Drive SiPh advanced packaging product innovations and design enablement, support new customer products with innovative design solutions, conduct cross-functional design reviews, resolve technical and yield concerns, develop complex analysis models for manufacturability and cost, ensure technology performance meets customer expectations, drive continuous improvement plans
Seniority
Senior, hands-on IC with significant experience
