MTS Packaging Integration Engineer
Core
Deliver industry-leading electro-optical transceivers using GF's Photonix platform and advanced 2.5D/3D co-packaged optics form factors, focusing on tool-process interactions for SiPh Flip Chip assembly and module reliability.
Role type
Senior IC packaging integration engineer (electro-optical)
Builds
Co-packaged optics modules and SiPh Flip Chip assemblies
Domain
Semiconductor manufacturing, photonics, advanced packaging
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work -> product features (electro-optical transceivers and modules)
Required skills
failure analysis, design of experiments, packaging process integration, product packaging design reviews, FMEA, materials selection, SiPh advanced packaging, chiplet reliability qualification, process integration specifications, manufacturing driven design rules, cross-functional technical resolution, test structure development, continuous improvement planning
Preferred skills
materials science, thermal/mechanical simulation, photonic/electrical interconnect innovation, 2D/2.5D/3D/3.5D SiPh packaging expertise, global technology/commercial trend analysis
Technologies
Copper RX, Copper uPillar, chip-on-wafer hybrid bonding, wafer-to-wafer hybrid bonding, detachable fiber optic couplers, grating couplers, edge couplers, passive V-groove, 3D MEMs spot size converters
Responsibilities
Define process integration specifications for assembly flow; establish manufacturing driven design rules; drive product packaging design reviews and FMEAs; support new designs with module characterization and design rule development; resolve process integration issues and yield concerns; develop custom processes to meet customer needs; drive CIP to deliver organizational goals
Seniority
Senior, hands-on IC
