CareerPlan

MTS Packaging Engineer

Hsinchu, TaiwanFull-time2026-11-09 → 2026-11-10
Based in Taiwan

Core

Lead NPI-to-HVM industrialization and end-to-end DFM integration for advanced IC packages across external OSAT and foundry partners to ensure manufacturable designs and high-volume production readiness.

Role type

Senior IC packaging engineer (manufacturing operations)

Builds

Advanced packaging platforms (2.5D interposer, wafer-level fan-out, high-density flip-chip) for enterprise servers, client products, and AI accelerators

Domain

Semiconductor manufacturing / Advanced packaging

Required skills

Advanced packaging process expertise, NPI-to-HVM transition management, Design for Manufacturing (DFM) integration, Yield and quality improvement, Cross-functional supplier enablement, Root cause analysis (DOE, SPC, FMEA, 8D), Lean/Six Sigma

Preferred skills

Experience with OSATs and foundries, 2.5D interposer/WLFO/flip-chip processes, RDL and TCB processes, Data-driven decision making, Stakeholder management

Technologies

CoWoS, WLFO, RDL, TCB, DOE, SPC, FMEA, 8D, Lean/Six Sigma

Responsibilities

Lead end-to-end NPI-to-HVM industrialization of advanced packages, Coordinate ramp plans and risk mitigation, Drive DFM integration between design and external partners, Monitor yield and quality across external sites, Lead cross-functional investigations of yield excursions, Collaborate with product development, reliability, and supply chain teams

Seniority

Senior, hands-on IC