CareerPlan

SMTS Silicon Design Engineer

San Diego, CaliforniaFull-time2026-11-06 → 2026-11-10

Core

Research, design, develop, and test electronic components and systems for semiconductor manufacturing, focusing on ASIC development and complex integrated circuit layout.

Role type

Senior IC analog silicon design engineer (power management IPs)

Builds

ASICs and power management IP blocks for AMD processors

Domain

Semiconductor / Analog IC Design

Required skills

Analog circuit design, ASIC layout, floor planning, electromigration analysis, reliability analysis, performance/power/area optimization, test plan creation, Cadence Virtuoso, Ansys Totem, Ansys RedHawk

Technologies

Cadence Virtuoso, Ansys Totem, Ansys RedHawk

Responsibilities

Develop analog circuits in advanced process nodes for Power management IPs; Create test plans to verify design according to circuit and block microarchitecture specifications; Develop placement and floor planning layout; Analyze electromigration and reliability; Optimize performance, power, area, and reliability of circuits.

Seniority

Senior, hands-on IC