CareerPlan

Lead Power Methodology Analysis Engineer

Santa Clara, CaliforniaFull-time2026-10-22 → 2026-11-10
No visa sponsorship

Core

Develop next-generation power analysis, modeling, and optimization methodologies for complex semiconductor systems across the design lifecycle.

Role type

Lead Power Methodology Analysis Engineer

Builds

Scalable frameworks, automation, and data-driven solutions for power evaluation and design optimization.

Domain

Semiconductor / ASIC and SoC design

Deliverable

production ML models

Required skills

Power analysis, Power modeling, Power optimization, AI/ML techniques, ASIC/SoC development methodologies, Technical leadership, Mentoring

Preferred skills

RTL power analysis, Physical design power optimization, Silicon power characterization, Workload-driven analysis

Technologies

AI/ML frameworks, Automation tools

Responsibilities

Develop methodologies for power analysis, modeling, correlation, and optimization; Create scalable frameworks and automation; Apply advanced analytics and AI/ML to improve workflows; Partner with architecture, design, verification, and silicon teams; Lead technical initiatives spanning multiple disciplines; Mentor engineers and share technical knowledge.

Seniority

Senior, hands-on IC with mentorship responsibilities