CareerPlan

SerDes Silicon Design and Micro-Architecture Engineer

San Jose, CaliforniaFull-time2026-10-15 → 2026-11-10
No visa sponsorship

Core

Design and define high-performance electrical and optical transceivers (SerDes) in advanced CMOS PDKs, focusing on analog/mixed-signal circuit design and micro-architecture.

Role type

Senior IC analog/mixed-signal engineer (SerDes micro-architecture)

Builds

High-speed electrical and optical transceivers for AMD processors

Domain

Semiconductor / Analog Mixed-Signal / High-Speed Interfaces

Required skills

Analog/mixed-signal circuit design, Transceiver micro-architecture, Ultra-high-speed PHY design, Modeling and simulation, Verification (pre-tapeout/post-silicon), Link budgeting, Architecture definition

Preferred skills

Top-level and block-level electrical/optical link budgeting, Design specification documentation, Architecture reviews, Design verification, Silicon validation

Technologies

CMOS PDKs, Tx/Rx analog front-end, Clocking circuits, DSPs, CDR, Adaptation and calibration loops, Firmware loops

Responsibilities

Lead transceiver micro-architecture definition, modeling, simulation, implementation, and verification; Work with pre-tapeout verification and post-silicon validation teams to bring up silicon and analyze productization data

Seniority

Senior, hands-on IC