RTL Design Engineer - PCIE, Ethernet, USB and DDR
Core
Design and integration of in-house/vendor IPs, subsystems, and SoCs with a focus on PCIE, DDR, USB, and Ethernet protocols.
Role type
Senior RTL Design Engineer (Digital/VLSI)
Builds
High-quality industry-leading processor technologies and SoCs
Domain
Semiconductor / VLSI / Digital Design
Required skills
RTL coding, VLSI fundamentals, FIFO design, arbitration techniques, static QC (LINT, CDC, RDC, CLP/VCLP), constraint development (SDC, UPF), timing closure, verification robustness
Preferred skills
PCIE, AMBA, IPXACT, QC tools/flows
Technologies
PCIE, DDR, USB, Ethernet, AMBA, SDC, UPF, LINT, CDC, RDC, CLP/VCLP, IPXACT
Responsibilities
Develop and maintain design and integration for various in-house/vendor IPs, subsystems, and SoCs; Ensure quality of the IP/Subsystem/SoC through various static QCs; Develop and own various constraints like SDC, UPF; Interact with various stakeholders to ensure timing closure and verification robustness
Seniority
Senior, hands-on IC
