Sr. Manager Packaging Engineering
Core
Lead end-to-end execution of next-generation Data Center GPU and MI package design programs, delivering high-performance, high-complexity package solutions.
Role type
Senior Manager, Packaging Engineering
Builds
High-performance Data Center GPU and MI packages for AMD
Domain
Semiconductor / Advanced Packaging
Deliverable
production ML models
Required skills
Program management, Cross-functional leadership, Risk management, Team mentorship, Design convergence, Vendor management, Process innovation, AI/ML tool adoption, Stakeholder influence
Preferred skills
Semiconductor package design, High-speed design, Multi-die integration, OSAT/substrate vendor experience, Data Center GPU/HPC experience, Synopsys 3DICC, Cadence SiP/APD
Technologies
Synopsys 3DICC, Cadence SiP, Cadence APD, AI/ML tools
Responsibilities
Lead end-to-end execution of multiple concurrent package design programs ensuring schedule, quality, and cost targets; Lead, mentor, and grow a high-performing team of package design engineers; Collaborate with silicon, SI/PI, thermal, mechanical, and manufacturing teams to ensure design convergence; Engage with OSAT and substrate vendors to drive design feasibility and yield optimization; Define and drive improved design methodologies and workflows; Champion adoption of AI/ML-enabled tools and automation.
Seniority
Senior, hands-on IC leader with team management
