Power Methodology and Modelling Engineer
Core
Drive SoC power efficiency methodology with a primary focus on RTL and architecture to improve power efficiency across AMD products.
Role type
SoC power methodology and modeling engineer
Builds
IP and SoC power models, RTL simulations, and power-efficiency features
Domain
Semiconductor / Processor Architecture
Required skills
RTL design, digital logic, SoC architecture, RTL power analysis, power modeling, power projection, hardware emulation, Python scripting
Preferred skills
CPU/memory subsystems knowledge, low-power design techniques, power-management concepts, design data analysis
Technologies
Python, RTL simulators, emulation tools
Responsibilities
Contribute to SoC power methodology and RTL power analysis; Collaborate with architecture, RTL design, verification, and power teams; Analyze power and performance tradeoffs using power models and simulations; Evaluate simulation and emulation traces for power projection; Support development of SoC power models and methodologies; Identify key power contributors and drive RTL power optimizations.
Seniority
Mid-level IC engineer
