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CPU Microarchitecture and Design Intern

Sophia Antipolis, FranceInternship$27,000–$27,0002026-10-14 → 2026-10-15
Hybrid

Core

Design and optimize energy-efficient CPU hardware at the microarchitectural and RTL level, balancing performance, power, area, and frequency.

Role type

CPU microarchitecture and RTL design intern

Builds

Production-quality CPU designs and models for Arm partners

Domain

Semiconductor / CPU Design

Required skills

Computer architecture fundamentals, Hardware description languages (VHDL, Verilog, SystemVerilog), Linux, Programming/scripting (C, C++, Python), Technical problem analysis

Preferred skills

ASIC design experience, Microprocessor design experience

Technologies

Verilog, SystemVerilog, VHDL, C, C++, Python, Linux

Responsibilities

Understand existing microarchitecture and identify limitations, Explore alternative solutions, Develop or extend models, Implement changes in production-quality RTL, Evaluate impact on efficiency and performance metrics

Seniority

Intern