DFT - MBIST
Core
Design and integration of DFT structures (SCAN, ATPG, MBIST, BSCAN) for complex SoCs, including silicon debug and defect identification.
Role type
Senior IC DFT Design Engineer
Builds
DFT design and verification flows for complex System-on-Chip (SoC) architectures
Domain
Semiconductor / ASIC Design
Required skills
DFT architecture design, Scan/ATPG pattern generation, Perl/Python/TCL scripting, EDA tools (Tessent, Design Compiler, Spyglass), RTL development (Verilog/System Verilog), IP integration, Static timing analysis, Unit-level verification
Preferred skills
Low power concepts (clock/power gating), Post-silicon bring up, End-to-End DFT flow development
Technologies
Perl, Python, TCL, Verilog, System Verilog, Tessent, Design Compiler, Spyglass
Responsibilities
Align DFT requirements with Architecture and IP teams, Design correct-by-construction DFT designs, Collaborate with RTL/Verification/PD teams to accelerate defect identification
Seniority
Senior, hands-on IC
