IP Design Lead - Sr Staff
Core
Lead the RTL design and architecture of high-performance x86-core ISA features, power management, cache, and coherency for next-gen processors.
Role type
Sr Staff IC Silicon Design Engineer (Digital IP/RTL)
Builds
High-performance x86 processor cores and subsystems for AMD's leading-edge products
Domain
Semiconductor / Digital IC Design
Required skills
Verilog RTL design, x86 architecture, IP integration, clock/reset/power design, low-power techniques, DFT collaboration, micro-architecture, team leadership
Preferred skills
Python/Perl scripting, front-end EDA tools sign-off, functional design verification, multiscale digital IP projects
Technologies
Verilog, Python, Perl, EDA tools, x86 ISA
Responsibilities
Architect and design power management features, cache, and coherency; Lead design team and mentor junior members; Resolve inter-IP integration issues; Own clock-domain crossing and linting aspects; Collaborate with DFT, Physical Design, and SOC teams
Seniority
Sr Staff, hands-on IC with mentorship
